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r ev 2.1, may 2, 2008 page 1 of 11 2 400 west cesar chavez, austin, tx 78701 1+(512) 416 - 8500 1+(512) 416 - 9669 www.silabs.com sl23ep04nz key features ? dc to 22 0 mhz operating frequency range ? low output clock skew: 6 0ps - typ ? low part -to - part output skew: 80 ps - typ ? 3.3 v to 2.5v operation supply voltage range ? low power dissipation: ? - 10 ma - typ at 66 mhz at vdd=3.3v ? - 9 ma - typ at 66 mhz at vdd=2.5v ? one input to four output fanout buffer drivers ? output enable (oe) control function ? available in 8 - pin tssop package ? available in commercial and industrial grades ? available in lead (pb) free package applications ? general purpose pci /pci - x clock b uffer ? printers, mfps and digital copiers ? pcs and work stations ? routers, switchers and servers ? datacom and telecom ? high - speed digital embeded systems description the sl23 ep 04nz is a low skew , jitter and power fanout b uffer de signed to produce up to four (4 ) clock outputs from one (1) reference input clock, for high sp eed clock distribution , including pci/pci - x applications. the sl23 ep04 nz products operate from dc to 22 0mhz. the only difference between sl23 ep04- 1 and sl23 ep 04nz - 1z is the oe logic implementat ion. refer to the available oe logic configuration table. 1 benefits ? up to four (4 ) distribution of input clock ? lo w propagation delay ? low output -to - output skew ? low output jitter ? low power dissipation block diagram logic control clk1 clk2 clk3 clk4 clkin oe gnd vdd low jitter and skew dc to 220 mhz clock buffer
rev 2.1, may 2, 2008 page 2 of 11 sl23ep04nz pin configuration 1 2 3 4 8 7 6 5 clk4 clk3 vdd clk2 gnd clk1 oe clkin 8 - pin tssop pin description pin number pin name pin type pin description 1 clkin input reference clock input 2 oe output output enable . refer to the table. 1 for logic table 3 clk 1 output buffered clock out put 1 4 gnd power power ground. 5 clk 2 output buffered clock output 2 6 vdd output 3.3v to 2.5v +/ - 10% power supply 7 clk3 power buffered clock output 3 8 clk4 input buffered clock output 4
rev 2.1, may 2, 2008 page 3 of 11 sl23ep04nz general description the sl23 ep 04nz is a low skew, jitter a nd power fanout clock distribution b uffer designed to produce up to four (4) clock outputs from one (1) reference input clock, for high speed clock distribution, including pci/pci -x applications. input and output frequency range the input and output fre quency is the same (1x) for sl23 ep04nz - 1 and sl23 ep04 nz -1z . the products operate from dc to 220mhz clock range with up to 30pf output loads at each output. oe (output enable) function the only difference between sl23 ep04- 1 and sl23 ep 04nz - 1z is the o e logic implementation. when oe=0, sl23ep 04nz - 1 outputs are disabled and outputs are at logic low. in the case of sl23 ep 04nz - 1z the outputs are at high - z. refer to the available oe logic configuration table. 1 below. output clock skew all outputs shoul d drive the similar load to achieve output - to - output skew and input -to - output delay specifications as given in the switching e lectrical tables. power supply range (vdd) the sl23ep04 is designed to operate from 3.3v +/ - 10% to 2.5v+/ - 10% vdd power supply range . an internal on- chip voltage regulator is used to provide to constant power supply of 1.8v in the core , leading to a consistent and stable electric al performance in terms of skew and jitter. the sl23 ep04nz i/o is powered by using vdd. con tact sli for 1.8 v power sup ply fan - out buffer and zdb products. clkin (pin - 1) oe (pin - 2) sl2304nz - 1 clkout [1:4] sl2304nz - 1z clkout [1:4] low low low high -z high low low high -z low high low low high high high high table 1. available sl23 ep 04 clkin and oe logic configurations
rev 2.1, may 2, 2008 page 4 of 11 sl23ep04nz absolute maximum ratings (all products) description condition min max unit supply voltage, vdd - 0.5 4. 2 v all inputs and outputs - 0.5 vdd+0.5 v ambient operat ing temperature in operation, c - grade 0 70 c ambient operating temperature in operation, i - grade -40 85 c storage temperature no power is applied -65 150 c junction temperature in operation, power is applied ? 125 c soldering temperature ? 260 c esd rating (human body model) jedec22 - a114d - 4,000 4,000 v esd rating (charge device model) jedec22 - c101c - 1,500 1,500 v esd rating (machine model) jedec22 - a115d -250 250 v operating conditions (c and i - grade) unless ot herwise stated vdd= 3.3v+/ - 10%, cl =15pf description symbol condition min typ max unit operating voltage vdd 1 vdd+/ -10% 2.97 3.3 3.63 v operating temperature ta -1 ambient temperature c - grade 0 ? 70 c ta -2 ambient temperature i - grade -40 ? 85 c input capacitance vinc pins 1 and 2 ? 3 5 pf load capacitance cl1 all outputs 220mhz, 3.3v ? ? 15 pf cl2 all outputs 134mhz, 3.3v ? ? 30 pf operating frequency fclkin 1 input clock range, cl=15pf dc ? 220 mhz operating frequency fclkin2 input clock range, cl=30pf dc ? 134 mhz
rev 2.1, may 2, 2008 page 5 of 11 sl23ep04nz dc electrical characteristics (c - grade and vdd=3.3v ) unless otherwise stated vdd= 3.3v+/ - 10%, cl=15pf and ambient temperature range 0 to +70c description symbol condition min typ max unit input low voltage vinl clki n and oe ? ? 0.8 v input high voltage vinh clkin and oe 2.0 ? vdd+0.3 v input low current iinl 0 < vin < 0.8v ? ? 10 a input high current iinh 2.4v < vin < vdd ? ? 1 5 a output low voltage vol i ol =12ma ? ? 0.4 v output high voltage voh i oh = - 12ma 2 .4 ? ? v power supply current idd1 clkin=33mhz cl=0 (no load at outputs) ? 8 12 ma power supply current idd2 clkin=66mhz cl=0 (no load at outputs) ? 10 15 ma power supply current idd3 clkin=166mhz cl=0 (no load at outputs) ? 14 20 ma switching elec trical characteristics (c - grade and vdd=3.3v ) unless otherwise stated vdd= 3.3v+/ - 10%, cl=15pf and ambient temperature range 0 to +70c description symbol condition min typ max unit output frequency range fout1 cl=15pf 0 - 220 mhz fout2 cl=30pf 0 - 1 34 mhz input duty cycle dc1 measured at vdd/2 20 50 80 % output duty cycle dc2 cl=15pf, fout=166mhz measured at vdd/2 45 50 55 % output duty cycle dc3 cl=30 pf, fout=100 mhz measured at vdd/2 40 50 60 % output rise/fall time tr/f -1 cl=15pf, measured at 0 .8v to 2.0v ? ? 1. 2 ns output rise/fall time tr/f -2 cl=30pf, measured at 0.8v to 2.0v ? ? 1.6 ns output to output skew skw1 measured at vdd/2 and outputs are equally loaded ? 6 0 120 ps part to part skew skw2 measured at vdd/2 and outputs are equally loa ded ? 80 160 ps propagation delay time pdt measured at vdd/2 from clkin to output clock rising edge and outputs are equally loaded 1.5 2.5 3 .5 ns cycle -to - cycle jitter ccj1 clkin=66mhz and cl=0 (no load) ? 35 70 ps cycle -to - cycle jitter ccj2 clkin=166mh z and cl=0 (no load) ? 25 50 ps power - up time tpu power - up time for vdd to reach maximum specified time 0.05 ? 100 ms
rev 2.1, may 2, 2008 page 6 of 11 sl23ep04nz dc electrical characteristics (i - grade and vdd=3.3v ) unless otherwise stated vdd= 3.3v+/ - 10%, cl=15pf and ambient temperature r ange - 40 to +85 c description symbol condition min typ max unit input low voltage vinl clkin and oe ? ? 0.8 v input high voltage vinh clkin and oe 2.0 ? vdd+0.3 v inpu t low current iinl 0 < vin < 0.8v ? ? 10 a input high current iinh 2.4v < vin < vdd ? ? 15 a output low voltage vol i ol =12 ma ? ? 0. 4 v output high voltage voh i o h = -12ma 2.4 ? ? v power supply current idd1 clkin=33mhz cl=0 (no load at outputs) ? 9 1 3 ma power supply current idd2 clkin=66mhz cl=0 (no load at outputs) ? 11 16 ma power supply current idd3 clkin=166mhz cl=0 (no load at outputs) ? 15 2 1 ma switchi ng electrical characteristics (i - grade and vdd=3.3v ) unless otherwise stated vdd= 3.3v+/ - 10%, cl=15pf and ambient temperature range - 40 to +85 c description symbol condition min typ max unit output frequency range fout1 cl=15pf 0 - 200 mhz fout2 cl=30pf 0 - 134 mhz input duty cycle dc1 measured at vdd/2 20 50 80 % output duty cycle dc2 cl=15pf, fout=166mhz measured at vdd/2 45 50 55 % output duty cycle dc3 cl= 30pf, fout=134mhz measured at vdd/2 40 50 60 % output rise /fall time tr /f-1 cl=1 5pf, measured at 0.6v to 1.8 v ? ? 1. 4 ns output rise/ fall time t r/f -2 cl=30 pf, measured at 0.6v to 1.8 v ? ? 1.8 ns output to output skew skw1 measured at vdd/2 and outputs a re equally loaded ? 70 140 ps part to part skew skw2 measured at vdd/2 and outputs are equally loaded ? 90 180 ps propagation delay time pdt measured at vdd/2 from clkin to output clock rising edge and outputs are equally loaded 1.2 2.5 3.8 ns cycle -to - cycle jitter ccj1 clkin=66mhz and cl=0 (no load) ? 40 80 ps cycle -to - cycle jitter ccj2 clkin=166 mhz and cl=0 (no load) ? 3 0 6 0 ps power - up time tpu power - up time for vdd to reach minimum specified time 0.05 ? 100 ms
rev 2.1, may 2, 2008 page 7 of 11 sl23ep04nz operating conditions (c and i - grade and vdd=2.5v ) unless otherwise stated vdd= 2.5 v+/ - 10%, cl=15pf and ambient temperature range 0 to +70c description symbol condition min typ max unit operating voltage vdd vdd+/ -10% 2.25 2.5 2.75 v operating temperature ta -1 ambient temperature c - grad e 0 ? 70 c ta -2 ambient temperature i - grade -40 ? 85 c input capacitance vinc pins 1 and 2 ? 3 5 pf load capacitance cl1 all outputs 180 mhz ? ? 1 5 pf cl2 all outputs 80 mhz ? ? 30 pf operating frequency clkin 1 input clock range, cl=15pf dc ? 180 m hz operating frequency clkin2 input clock range, cl=30pf dc ? 80 mhz dc electrical characteristics (c - grade and vdd=2.5v ) unless otherwise stated vdd= 2.5 v+/ - 10%, cl=15pf and ambient temperature range 0 to +70c description symbol condition min typ ma x unit input low voltage vinl clkin and oe ? ? 0.7 v input high voltage vinh clkin and oe 1.7 ? vdd+0.3 v input low current iinl 0 < vin < 0.8v ? ? 10 a input high current iinh 2.4v < vin < vdd ? ? 1 5 a output low voltage vol i ol =8ma ? ? 0.4 v output high voltage voh i oh = - 8ma vdd - 0.6 ? ? v power supply current idd1 clkin=33mhz cl=0 (no load at outputs) ? 7 11 ma power supply current idd2 clkin=66mhz cl=0 (no load at outputs) ? 9 1 4 ma power supply current idd3 clkin=166mhz cl=0 (no load a t outputs) ? 13 18 ma switching electrical characteristics (c - grade and vdd=2.5v ) unless otherwise stated vdd= 2.5 v+/ - 10%, cl=15pf and ambient temperature range 0 to +70c description symbol condition min typ max unit output frequency range fout1 cl= 15pf 0 - 180 mhz fout2 cl=30pf 0 - 80 mhz input duty cycle dc1 measured at vdd/2 20 50 80 % output duty cycle dc2 cl =15pf, fout= 1 66 mhz measured at vdd/2 45 50 55 %
rev 2.1, may 2, 2008 page 8 of 11 sl23ep04nz output duty cycle dc3 cl= 30pf, fout=80 mhz measured at vdd/2 40 50 60 % output rise /fal l time tr /f-1 cl=1 5pf, measured at 0.6v to 1.7 v ? ? 1. 6 ns output rise /fall time tr/f -2 cl =30 pf , measured at 0.6v to 1.7 v ? ? 2. 0 ns output to output skew skw1 measured at vdd/2 and outputs are equally loaded ? 70 140 ps part to part skew skw2 measured at vdd/2 and outputs are equally loaded ? 90 180 ps propagation delay time pdt measured at vdd/2 from clkin to output clock rising edge and outputs are equally loaded ? xxx xxx ns cycle -to - cycle jitter ccj1 clkin=66mhz and cl=0 (no load) ? 50 100 ps cyc le -to - cycle jitter ccj2 clkin=166 mhz and cl=0 (no load) ? 4 0 8 0 ps power - up time tpu power - up time for vdd to reach minimum specified time 0.05 ? 100 ms dc electrical characteristics (i - grade and vdd=2.5v ) unless otherwise stated vdd= 2.5 v+/ - 10%, cl=15 pf and ambient temperature range - 40 to +85 c description symbol condition min typ max unit input low voltage vinl clkin and oe ? ? 0. 7 v input high voltage vinh clkin and oe 1.7 ? vdd+0.3 v inpu t low current iinl 0 < vin < 0.8v ? ? 10 a input hig h current iinh 2.4v < vin < vdd ? ? 1 5 a output low voltage vol i ol = 8 ma ? ? 0. 4 v output high voltage voh i o h = -8 ma vdd -0. 6 ? ? v power supply current idd1 clkin=33mhz cl=0 (no load at outputs) ? 8 1 2 ma power supply current idd2 clkin=66mhz cl=0 (no load at outputs) ? 1 0 1 5 ma power supply current idd3 clkin=166 mhz cl=0 (no load at outputs) ? 1 2 19 ma switchi ng electrical characteristics (i - grade and vdd=2.5v ) unless otherwise stated vdd= 2.5 v+/ - 10%, cl=15pf and ambient temperature range -40 to +85 c description symbol condition min typ max unit output frequency range fout1 cl=15pf 0 - 1 80 mhz fout2 cl=30pf 0 - 80 mhz input duty cycle dc1 measured at vdd/2 2 0 50 8 0 % output duty cycle dc2 cl =15pf, fout= 1 66 mhz measured at vdd/2 45 50 55 %
rev 2.1, may 2, 2008 page 9 of 11 sl23ep04nz output duty cycle dc3 cl= 15pf, fout=80 mhz measured at vdd/2 45 50 55 % output rise /fall time tr /f-1 cl=15pf, measured at 0.6v to 1.7 v ? ? 1. 8 ns output rise/ fall time tr/f -2 cl=30 pf, measured at 0.6v to 1.7 v ? ? 2.4 ns output to output skew skw1 me asured at vdd/2 and outputs are equally loaded ? 100 200 ps part to part skew skw2 measured at vdd/2 and outputs are equally loaded ? 120 240 ps propagation delay time pdt measured at vdd/2 from clkin to output clock rising edge and outputs are equally l oaded ? 4.2 6.8 ns cycle -to - cycle jitter ccj1 clkin=66mhz and cl=0 (no load) ? 70 140 ps cycle -to - cycle jitter ccj2 clkin=133mhz and cl=0 (no load) ? 6 0 120 ps power - up time tpu power - up time for vdd to reach minimum specified time 0.05 ? 100 ms exter nal components & design considerations typical application schematic sl23ep04nz 0.1f clkin clk2 clk3 gnd vdd 1 6 4 8 5 3 cl clk1 cl cl cl clk4 7 oe 2 comments and recommendations decoupling capacitor: $ghfrxsolqjfdsdflwruri)pxvwehxvhgehwzhhq9''dqg966slqv3odfhwkh capacitor on the component side of the pcb as close to the vdd pin as possible. the pcb trace to the vdd pin and to the gnd via should be kept as short as possible. do not u se vias between the decoupling capacitor and the vdd pin. package outline and package dimensions
rev 2.1, may 2, 2008 page 10 of 11 sl23ep04nz 8 - pin tssop (4.4 mm ) 1 4 8 5 6.250( 0.246) 6.500( 0.256) 4.300(0.169) 4. 500( 0. 177) 2.900(0.114) 3.100(0.122 ) 0.850(0 .033) 0.950(0 .037) 0.190( 0.007) 0.300(0.012 ) 0.650(0. 025) bsc 0.050(0.002) 0.150(0.006) 1.100(0.043) max 0.076(0.003) 0 to 8 0.500(0.020 ) 0.700(0.027) 0.250(0.010) bsc gauge plane 0.090( 0.003) 0.200(0.008 ) dimensions are in milimeters(inches). top line : (min) and bottom line : (max) pin-1 id seating plane thermal characteristics parameter symbol condition min typ max unit thermal resistance junction t o ambient ja still air - 110 - c/w ja 1m/s air flow - 100 - c/w ja 3m/s air flow - 80 - c/w thermal resistance junction to case jc independent of air flow - 35 - c/w ordering information [1 ] ordering number marking shipping package package tem perature
rev 2.1, may 2, 2008 page 11 of 11 sl23ep04nz sl23ep04nzzc - 1 sl23ep04n zc - 1 tube 8 - pin tssop 0 to 70c sl23ep04nzzc - 1t sl23ep04n zc - 1 tape and reel 8 - pin tssop 0 to 70c sl23ep04nzzi -1 sl23ep04n zi -1 tube 8 - pin tssop - 40 to 85c sl23ep04nzzi - 1t sl23ep04n zi - 1 tape and reel 8 - pin tssop - 40 to 85c sl23ep04nzzc -1z sl23ep04n zc -1z tube 8 - pin tssop 0 to 70c sl23ep04nzzc - 1zt sl23ep04n zc - 1z tape and reel 8 - pin tssop 0 to 70c sl23ep04nzzi - 1z sl23ep04n zi - 1z tube 8 - pin tssop - 40 to 85c sl23ep04nzzi - 1zt sl23ep04n zi -1z tape and reel 8 - pin tssop -40 to 85c notes: 1 . the sl23 ep 04nz products are rohs compliant. the information in this document is believed to be accurate in all respects at the time of publication but is subject to chan ge without notice. silicon laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. additionally, silicon laboratories assumes no responsibility for the f unctioning of undescribed features or parameters. silicon laboratories reserves the right to make changes without further notice. silicon laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purp ose, nor does silicon laborato ries assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wit hout limitation consequential or incidental damages. silicon laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which th e failure of the silicon labor atories product could create a situation where personal injury or death may occur. should buyer purchase or use silicon laboratories products for any such unintended or unauthorized application, buyer shall indemnify and hold silicon laboratories harmless against all claims and damages.

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